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U.S. Department of Energy
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Network cache injection for coherent GPUs

Patent ·
OSTI ID:1998535
Methods, devices, and systems for GPU cache injection. A GPU compute node includes a network interface controller (NIC) which includes NIC receiver circuitry which can receive data for processing on the GPU, NIC transmitter circuitry which can send the data to a main memory of the GPU compute node and which can send coherence information to a coherence directory of the GPU compute node based on the data. The GPU compute node also includes a GPU which includes GPU receiver circuitry which can receive the coherence information; GPU processing circuitry which can determine, based on the coherence information, whether the data satisfies a heuristic; and GPU loading circuitry which can load the data into a cache of the GPU from the main memory if on the data satisfies the heuristic.
Research Organization:
Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States); Advanced Micro Devices, Inc., Sunnyvale, CA (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
AC52-07NA27344
Assignee:
Advanced Micro Devices, Inc. (Sunnyvale, CA)
Patent Number(s):
11,687,460
Application Number:
15/498,076
OSTI ID:
1998535
Country of Publication:
United States
Language:
English

References (2)

Message passing on data-parallel architectures conference May 2009
Infiniband-Verbs on GPU: A Case Study of Controlling an Infiniband Network Device from the GPU conference May 2014

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