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SWAP Gate between a Majorana Qubit and a Parity-Protected Superconducting Qubit

Journal Article · · Physical Review Letters
 [1];  [2];  [3]
  1. Univ. of California, Berkeley, CA (United States); National Research Council (CNR) (Italy)
  2. Univ. of California, Berkeley, CA (United States); Harvard Univ., Cambridge, MA (United States)
  3. Univ. of California, Berkeley, CA (United States); Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States). Materials Sciences Division
High fidelity quantum information processing requires a combination of fast gates and long-lived quantum memories. Here, in this Letter, we propose a hybrid architecture, where a parity-protected superconducting qubit is directly coupled to a Majorana qubit, which plays the role of a quantum memory. The superconducting qubit is based upon a π-periodic Josephson junction realized with gate-tunable semiconducting wires, where the tunneling of individual Cooper pairs is suppressed. One of the wires additionally contains four Majorana zero modes that define a qubit. We demonstrate that this enables the implementation of a SWAP gate, allowing for the transduction of quantum information between the topological and conventional qubit. This architecture combines fast gates, which can be realized with the superconducting qubit, with a topologically protected Majorana memory.
Research Organization:
Lawrence Berkeley National Laboratory (LBNL), Berkeley, CA (United States)
Sponsoring Organization:
USDOE Office of Science (SC); European Union (EU)
Grant/Contract Number:
AC02-05CH11231
OSTI ID:
1963835
Journal Information:
Physical Review Letters, Journal Name: Physical Review Letters Journal Issue: 17 Vol. 129; ISSN 0031-9007
Publisher:
American Physical Society (APS)Copyright Statement
Country of Publication:
United States
Language:
English

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