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Hybrid stochastic synapses enabled by scaled ferroelectric field-effect transistors

Journal Article · · Applied Physics Letters
DOI:https://doi.org/10.1063/5.0132242· OSTI ID:1962307
Achieving brain-like density and performance in neuromorphic computers necessitates scaling down the size of nanodevices emulating neuro-synaptic functionalities. However, scaling nanodevices results in reduction of programming resolution and emergence of stochastic non-idealities. While prior work has mainly focused on binary transitions, in this work, we leverage the stochastic switching of a three-state ferroelectric field-effect transistor to implement a long-term and short-term two-tier stochastic synaptic memory with a single device. Experimental measurements are performed on a scaled 28 nm high-k metal gate technology-based device to develop a probabilistic model of the hybrid stochastic synapse. In addition to the advantage of ultra-low programming energies afforded by scaling, our hardware–algorithm co-design analysis reveals the efficacy of the two-tier memory in comparison to binary stochastic synapses in on-chip learning tasks—paving the way for algorithms exploiting multi-state devices with probabilistic transitions beyond deterministic ones.
Research Organization:
Pennsylvania State Univ., University Park, PA (United States)
Sponsoring Organization:
USDOE; USDOE Office of Science (SC), Basic Energy Sciences (BES)
Grant/Contract Number:
SC0021118
OSTI ID:
1962307
Alternate ID(s):
OSTI ID: 1962443
Journal Information:
Applied Physics Letters, Journal Name: Applied Physics Letters Journal Issue: 12 Vol. 122; ISSN 0003-6951
Publisher:
American Institute of Physics (AIP)Copyright Statement
Country of Publication:
United States
Language:
English

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