Hardware Evaluation Analytical Modeling and Node Simulation: Benefits of Tighter GPU Integration

Technical Report · Thu Sep 30 00:00:00 EDT 2021

DOI:https://doi.org/10.2172/1841724· OSTI ID:1841724

Austin, Brian ^[1]; Bair, Ray ^[2]; Barker, Kevin ^[3]; Cabrera, Anthony ^[4]; Chien, Andrew ^[5]; Ding, Nan ^[1]; Firoz, Jesun ^[3]; Ibrahim, Khaled ^[1]; Manzano, Joseph ^[3]; Morozov, Vitali ^[2]; Nguyen, Tan ^[1]; Oliker, Leonid ^[1]; Suetterlein, Joshua ^[3]; Tang, Li ^[6]; Vetter, Jeffrey ^[4]; Williams, Samuel ^[1]; Yoshii, Kazutomo ^[2]; Young, Aaron ^[4]

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1. Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States)
2. Argonne National Lab. (ANL), Argonne, IL (United States)
3. Pacific Northwest National Lab. (PNNL), Richland, WA (United States)
4. Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States)
5. Argonne National Lab. (ANL), Argonne, IL (United States); Univ. of Chicago, IL (United States)
6. Los Alamos National Lab. (LANL), Los Alamos, NM (United States)

In this report, we examine several emerging technologies of interest to the Department of Energy and its computational centers. These include: 1) quantifying the benefit of tighter CPU-GPU integration, 2) quantifying the appropriate CPU core:GPU ratio, 3) quantifying the penalty for CPU-GPU disaggregation, 4) quantifying the benefits of tighter GPU-GPU integration, 5) quantifying the benefits of unified memory, and 6) quantifying the benefits of tighter FPGA-GPU integration.

• Research Organization: Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States)
• Sponsoring Organization: USDOE Office of Science (SC), Advanced Scientific Computing Research (ASCR)
• DOE Contract Number: AC02-05CH11231; AC05-00OR22725; AC02-06CH11357
• OSTI ID: 1841724
• Report Number(s): ECP-HIHE01-35; ark:/13030/qt8h57b16g
• Country of Publication: United States
• Language: English

Related Subjects

97 MATHEMATICS AND COMPUTING