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Using Floating-Gate Memory to Train Ideal Accuracy Neural Networks

Journal Article · Sat Jun 01 00:00:00 EDT 2019 · IEEE Journal on Exploratory Solid-State Computational Devices and Circuits

DOI:https://doi.org/10.1109/JXCDC.2019.2902409· OSTI ID:1839840

; ; Niroula, John; ; Hsia, Alex; Van Heukelom, Michael S.; ; Draper, Bruce;

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Research Organization:: Sandia National Laboratories (SNL-CA), Livermore, CA (United States)

Sponsoring Organization:: USDOE; USDOE National Nuclear Security Administration (NNSA)

Grant/Contract Number:: AC04-94AL85000; NA0003525

OSTI ID:: 1839840

Alternate ID(s):: OSTI ID: 1501628

Report Number(s):: SAND--2019-0981J; 8663600

Journal Information:: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, Journal Name: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Journal Issue: 1 Vol. 5; ISSN 2329-9231

Publisher:: Institute of Electrical and Electronics EngineersCopyright Statement

Country of Publication:: United States

Language:: English

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