Synchronization between processes in a coordination namespace
A system and method of supporting point-to-point synchronization among processes/nodes implementing different hardware barriers in a tuple space/coordinated namespace (CNS) extended memory storage architecture. The system-wide CNS provides an efficient means for storing data, communications, and coordination within applications and workflows implementing barriers in a multi-tier, multi-nodal tree hierarchy. The system provides a hardware accelerated mechanism to support barriers between the participating processes. Also architected is a tree structure for a barrier processing method where processes are mapped to nodes of a tree, e.g., a tree of degree k to provide an efficient way of scaling the number of processes in a tuple space/coordination namespace.
- Research Organization:
- International Business Machines Corp., Armonk, NY (United States)
- Sponsoring Organization:
- USDOE
- Assignee:
- International Business Machines Corporation (Armonk, NY)
- Patent Number(s):
- 11,023,291
- Application Number:
- 16/409,377
- OSTI ID:
- 1824027
- Country of Publication:
- United States
- Language:
- English
Hardware synchronization for embedded multi-core processors
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conference | May 2011 |
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