Scalable Yet Rigorous Floating-Point Error Analysis
- University of Utah
- BATTELLE (PACIFIC NW LAB)
Automated techniques for rigorous floating-point round-off error analysis are a prerequisite to placing important activities in HPC such as precision allocation, verification and code optimization on a formal footing. Yet existing techniques cannot provide tight bounds for expressions beyond a few dozen operators; barely enough for HPC. In this work, we offer an approach embedded in a new tool called SATIRE that scales error analysis by four orders of magnitude compared to today’s best-of-class tools. We explain how three key ideas underlying SATIRE help it attain such scale: path strength reduction, bound optimization and abstraction. SATIRE provides tight bounds and rigorous guarantees on significantly larger expressions with well over a hundred thousand operators, covering important examples including FFT, matrix multiplication and PDE stencils.
- Research Organization:
- Pacific Northwest National Laboratory (PNNL), Richland, WA (United States)
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- AC05-76RL01830
- OSTI ID:
- 1783243
- Report Number(s):
- PNNL-SA-154774
- Country of Publication:
- United States
- Language:
- English
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