skip to main content
OSTI.GOV title logo U.S. Department of Energy
Office of Scientific and Technical Information

Title: Intra-node high-performance computing network architecture with nanosecond-scale photonic switches

Journal Article · · Journal of Optical Communications and Networking
DOI:https://doi.org/10.1364/jocn.399925· OSTI ID:1673160

We propose a single-stage network architecture for intra-node connectivity that makes use of nanosecond-scale photonic switches. Although buffering at the switch points is of vital importance for complex multi-stage networks, this is not the case for smaller-scale single-stage networks where the end nodes are located only one hop apart. By limiting the buffering to the end points, the proposed architecture manages to minimize the required electro-optic and opto-electronic conversions, leading in this way to both low end-to-end latency and better energy efficiency. Combining these advantages with nanosecond-scale switching times can allow for high-throughput operation even for frequent switch reconfigurations. The performance of the proposed architecture is evaluated via discrete-event simulations for a wide range of synthetic-traffic cases. The simulation results show that high-throughput operation of ≥90% can be achieved even for small message sizes, i.e., 32 KB for all-to-all communication and 2 KB for uniform random traffic, at a data rate of 400 Gb/s and a switch reconfiguration time of ≤72 ns. Moreover, if 100-ns reconfiguration times are achievable as opposed to 150-ns, then for the all-to-all traffic case a 16% and 28% reduction in completion time can be achieved for message sizes of 8 KB and 1 KB, respectively. In a forthcoming era of optically interfaced processors and accelerators, nanosecond-scale photonic switches appear as a highly promising solution for keeping up with the intra-node bandwidth scaling due to their high-bandwidth, low-latency and fast-switching capabilities.

Research Organization:
IBM Thomas J. Watson Research Center, Yorktown Heights, NY (United States); IBM Research, Yorktown Heights, NY (United States)
Sponsoring Organization:
USDOE Advanced Research Projects Agency - Energy (ARPA-E)
Grant/Contract Number:
AR0000846; AR0000844
OSTI ID:
1673160
Alternate ID(s):
OSTI ID: 1657827; OSTI ID: 1668899
Report Number(s):
DOE-IBM-0844-020
Journal Information:
Journal of Optical Communications and Networking, Vol. 12, Issue 12; ISSN 1943-0620
Publisher:
IEEE / Optical Society of America (OSA)Copyright Statement
Country of Publication:
United States
Language:
English

References (22)

Evaluating the Impact of Energy Efficient Networks on HPC Workloads conference December 2019
The high-speed networks of the Summit and Sierra supercomputers journal May 2020
Distributed Deep Learning Framework based on Shared Memory for Fast Deep Neural Network Training conference October 2018
Evaluating Modern GPU Interconnect: PCIe, NVLink, NV-SLI, NVSwitch and GPUDirect journal January 2020
DeepDownscale: A Deep Learning Strategy for High-Resolution Weather Forecast conference October 2018
Communication Scheduling Optimization for Distributed Deep Learning Systems conference December 2018
IBM POWER9 package technology and design journal July 2018
Silicon Photonic Switch Fabrics in Computer Communications Systems journal February 2015
Input Versus Output Queueing on a Space-Division Packet Switch journal December 1987
6.1 A 100Gb/s 1.1pJ/b PAM-4 RX with Dual-Mode 1-Tap PAM-4 / 3-Tap NRZ Speculative DFE in 14nm CMOS FinFET conference February 2019
A 56Gb/s burst-mode NRZ optical receiver with 6.8ns power-on and CDR-Lock time for adaptive optical links in 14nm FinFET CMOS
  • Ozkaya, Ilter; Cevrero, Alessandro; Francese, Pier Andrea
  • 2018 IEEE International Solid-State Circuits Conference (ISSCC), 2018 IEEE International Solid - State Circuits Conference - (ISSCC) https://doi.org/10.1109/ISSCC.2018.8310286
conference February 2018
Design and Fabrication of Low-Insertion-Loss and Low-Crosstalk Broadband $2\times 2$ Mach–Zehnder Silicon Photonic Switches journal September 2015
Low-Insertion-Loss and Power-Efficient 32 × 32 Silicon Photonics Switch With Extremely High-Δ Silica PLC Connector journal January 2019
Silicon Photonic Switch Fabrics: Technology and Architecture journal January 2019
A Gain-Integrated Silicon Photonic Carrier with SOA-Array for Scalable Optical Switch Fabrics conference January 2016
Lossless Operation of SOA-Integrated Silicon Photonics Switch for 8 × 32-Gbaud 16-QAM WDM Signals conference January 2018
A $4$ × $4$ Electrooptic Silicon Photonic Switch Fabric With Net Neutral Insertion Loss journal January 2020
A 25 Gb/s Burst-Mode Receiver for Low Latency Photonic Switch Networks journal December 2015
A Dynamically-Reconfigurable Burst-Mode Link Using a Nanosecond Photonic Switch journal March 2020
Towards Massively Parallel Simulations of Massively Parallel High-Performance Computing Systems conference January 2012
A Throughput-Optimized Optical Network for Data-Intensive Computing journal September 2014
Exploiting the Power of Multiplicity: A Holistic Survey of Network-Layer Multipath journal January 2015

Similar Records

Exploring the benefits of using co-packaged optics in data center and AI supercomputer networks: a simulation-based analysis [Invited]
Journal Article · Mon Jan 08 00:00:00 EST 2024 · Journal of Optical Communications and Networking · OSTI ID:1673160

Machine-learning-aided cognitive reconfiguration for flexible-bandwidth HPC and data center networks [Invited]
Journal Article · Wed Jan 20 00:00:00 EST 2021 · Journal of Optical Communications and Networking · OSTI ID:1673160

Toward lower-diameter large-scale HPC and data center networks with co-packaged optics
Journal Article · Mon Nov 30 00:00:00 EST 2020 · Journal of Optical Communications and Networking · OSTI ID:1673160