Compiler-Directed Soft Error Detection and Recovery to Avoid DUE and SDC via Tail-DMR

Liu, Qingrui; Jung, Changhee; Lee, Dongyoon; Tiwari, Devesh

doi:10.1145/2930667

Title: Compiler-Directed Soft Error Detection and Recovery to Avoid DUE and SDC via Tail-DMR

Journal Article · Mon Dec 19 00:00:00 EST 2016 · ACM Transactions on Embedded Computing Systems

DOI:https://doi.org/10.1145/2930667· OSTI ID:1565622

Liu, Qingrui ^[1]; Jung, Changhee ^[1]; Lee, Dongyoon ^[1]; Tiwari, Devesh ^[2]

Virginia Polytechnic Inst. and State Univ. (Virginia Tech), Blacksburg, VA (United States)
Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States)

This article presents Clover, a compiler-directed soft error detection and recovery scheme for lightweight soft error resilience. The compiler carefully generates soft-error-tolerant code based on idempotent processing without explicit checkpoints. During program execution, Clover relies on a small number of acoustic wave detectors deployed in the processor to identify soft errors by sensing the wave made by a particle strike. To cope with DUEs (detected unrecoverable errors) caused by the sensing latency of error detection, Clover leverages a novel selective instruction duplication technique called tail-DMR (dual modular redundancy) that provides a region-level error containment. Once a soft error is detected by either the sensors or the tail-DMR, Clover takes care of the error as in the case of exception handling. To recover from the error, Clover simply redirects program control to the beginning of the code region where the error is detected. The experimental results demonstrate that the average runtime overhead is only 26%, which is a 75% reduction compared to that of the state-of-the-art soft error resilience technique. In addition, this article evaluates an alternative technique called tail-wait, comparing it to Clover. According to the evaluation with the different processor configurations and the various error detection latencies, Clover turns out to be a superior technique, achieving 1.06 to 3.49× speedup over the tail-wait.

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Research Organization:: Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States). Oak Ridge Leadership Computing Facility (OLCF); UT-Battelle LLC/ORNL, Oak Ridge, TN (United States)

Sponsoring Organization:: USDOE Office of Science (SC)

DOE Contract Number:: AC05-00OR22725

OSTI ID:: 1565622

Journal Information:: ACM Transactions on Embedded Computing Systems, Vol. 16, Issue 2; ISSN 1539-9087

Publisher:: Association for Computing Machinery (ACM)

Country of Publication:: United States

Language:: English

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