The Ongoing Evolution of OpenMP

Journal Article · Mon Aug 13 00:00:00 EDT 2018 · Proceedings of the IEEE

DOI:https://doi.org/10.1109/JPROC.2018.2853600· OSTI ID:1465188

de Supinski, Bronis R. ^[1]; Scotland, Thomas R. W. ^[1]; Duran, Alejandro ^[2]; Klemm, Michael ^[3]; Bellido, Sergi Mateo ^[4]; Olivier, Stephen Lecler ^[5]; Terboven, Christian ^[6]; Mattson, Timothy G. ^[7]

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1. Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)
2. Intel Corp., Madrid (Spain)
3. Intel Deutschland GmbH, Feldkirchen (Germany)
4. Barcelona Supercomputing Center, Barcelona (Spain)
5. Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
6. RWTH Aachen Univ., Aachen (Germany)
7. Intel, Hillsboro, OR (United States)

Here, this paper presents an overview of the past, present and future of the OpenMP application programming interface (API). While the API originally specified a small set of directives that guided shared memory fork-join parallelization of loops and program sections, OpenMP now provides a richer set of directives that capture a wide range of parallelization strategies that are not strictly limited to shared memory. As we look toward the future of OpenMP, we immediately see further evolution of the support for that range of parallelization strategies and the addition of direct support for debugging and performance analysis tools. Looking beyond the next major release of the specification of the OpenMP API, we expect the specification eventually to include support for more parallelization strategies and to embrace closer integration into its Fortran, C and, in particular, C++ base languages, which will likely require the API to adopt additional programming abstractions.

• Research Organization: Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)
• Sponsoring Organization: USDOE National Nuclear Security Administration (NNSA)
• Grant/Contract Number: AC04-94AL85000; AC52-07NA27344
• OSTI ID: 1465188
• Alternate ID(s): OSTI ID: 1735813
• Report Number(s): SAND-2018-7212J; LLNL-JRNL-754009; 665399
• Journal Information: Proceedings of the IEEE, Vol. 106, Issue 11; ISSN 0018-9219
• Publisher: Institute of Electrical and Electronics Engineers
• Country of Publication: United States
• Language: English

Related Subjects

97 MATHEMATICS AND COMPUTING
accelerator architectures
computer architecture
computer science
computers and information processing
memory management
multicore processing
multithreading
parallel architectures
parallel processing
parallel programming
programming