Dynamic Control Structures and Their Use in Emulation [Thesis]

Technical Report · Sun Oct 01 00:00:00 EDT 1972

DOI:https://doi.org/10.2172/1453914· OSTI ID:1453914

Lesser, Victor R. ^[1]

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1. SLAC National Accelerator Laboratory (SLAC), Menlo Park, CA (United States)

This thesis describes an architecture for a parallel microcomputer system that permits a systematic and flexible approach to the emulation of a wide variety of complex sequential and parallel intermediate machine languages in a dynamically varying Processor-Memory-Switch (PKS) environment. This architecture is based on the view that complex emulators can be best structured in terms of a set of microprocessors that interact in a highly structure manner. These highly structured interaction patterns are defined through the concept of a virtual PMS environment. This concept embodies the capability for reconfiguring both the internal and the external environment of a microcomputer system: the number of internal working registers of each microprocessor; the structure of memory, e.g., its size and word length; and the number of microprocessors and functional units, and their interconnection and interaction patterns. The virtual PMS is implemented in the microcomputer architecture by adding a new global level of hardware control. A particular virtual PMS is dynamically defined by modifying the syntax (i.e., the number of data elements and their relationship) of the data structure for control used by this global hardware control level.

• Research Organization: SLAC National Accelerator Laboratory (SLAC), Menlo Park, CA (United States)
• Sponsoring Organization: USDOE Office of Science (SC)
• DOE Contract Number: AC02-76SF00515
• OSTI ID: 1453914
• Report Number(s): SLAC-R--157; SLAC--157
• Country of Publication: United States
• Language: English

Related Subjects

43 PARTICLE ACCELERATORS
97 MATHEMATICS AND COMPUTING