A Full Mesh ATCA-based General Purpose Data Processing Board (Pulsar II)
- Univ. of Sao Paulo (Brazil); et al.
The Pulsar II is a custom ATCA full mesh enabled FPGA-based processor board which has been designed with the goal of creating a scalable architecture abundant in flexible, non-blocking, high bandwidth interconnections. The design has been motivated by silicon-based tracking trigger needs for LHC experiments. In this technical memo we describe the Pulsar II hardware and its performance, such as the performance test results with full mesh backplanes from different vendors, how the backplane is used for the development of low-latency time-multiplexed data transfer schemes and how the inter-shelf and intra-shelf synchronization works.
- Research Organization:
- Fermi National Accelerator Laboratory (FNAL), Batavia, IL (United States)
- Sponsoring Organization:
- USDOE Office of Science (SC), High Energy Physics (HEP) (SC-25)
- Contributing Organization:
- CMS Collaboration
- DOE Contract Number:
- AC02-07CH11359
- OSTI ID:
- 1431570
- Report Number(s):
- FERMILAB-TM--2650-E; 1662880
- Country of Publication:
- United States
- Language:
- English
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