The SVX2 readout chip

Journal Article · Tue Aug 01 04:00:00 EDT 1995 · IEEE Transactions on Nuclear Science

DOI:https://doi.org/10.1109/23.467787· OSTI ID:136907

Zimmerman, T; Sarraj, M; Yarema, R ^[1]; Kipnis, I; Kleinfelder, S; Luo, L; Milgrome, O ^[2]

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1. Fermi National Accelerator Lab., Batavia, IL (United States)
2. Lawrence Berkeley Lab., CA (United States)

A new readout chip called SVX2 is being designed for silicon detector systems at Fermilab. SVX2 is essentially an upgrade of the presently used SVX chip and contains extensive performance and feature enhancements. SVX2 is designed to accommodate much shorter beam crossing times (132 ns to 400 ns) with minimal increase in noise and power. Analog signal delay is formed by a double correlated sampling pipeline on order to allow time for trigger formation. Signal digitization of up to eight bits is performed on the chip with an AD converter per channel. This allows threshold setting, sparsification, and readout to be purely digital. Design philosophy will be discussed and test results presented.

• DOE Contract Number: AC02-76CH03000; AC03-76SF00098
• OSTI ID: 136907
• Report Number(s): CONF-941061--
• Journal Information: IEEE Transactions on Nuclear Science, Journal Name: IEEE Transactions on Nuclear Science Journal Issue: 4Pt1 Vol. 42; ISSN 0018-9499; ISSN IETNAE
• Country of Publication: United States
• Language: English

Related Subjects

43 PARTICLE ACCELERATORS
44 INSTRUMENTATION
INCLUDING NUCLEAR AND PARTICLE DETECTORS
ANALOG-TO-DIGITAL CONVERTERS
COMPARATOR CIRCUITS
DESIGN
FERMILAB ACCELERATOR
INTEGRATED CIRCUITS
OPERATION
PERFORMANCE
PULSE INTEGRATORS
READOUT SYSTEMS
SI SEMICONDUCTOR DETECTORS