Future computing platforms for science in a power constrained era
- Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States)
- Princeton Univ., Princeton, NJ (United States)
Power consumption will be a key constraint on the future growth of Distributed High Throughput Computing (DHTC) as used by High Energy Physics (HEP). This makes performance-per-watt a crucial metric for selecting cost-efficient computing solutions. For this paper, we have done a wide survey of current and emerging architectures becoming available on the market including x86-64 variants, ARMv7 32-bit, ARMv8 64-bit, Many-Core and GPU solutions, as well as newer System-on-Chip (SoC) solutions. We compare performance and energy efficiency using an evolving set of standardized HEP-related benchmarks and power measurement techniques we have been developing. In conclusion, we evaluate the potential for use of such computing solutions in the context of DHTC systems, such as the Worldwide LHC Computing Grid (WLCG).
- Research Organization:
- Fermi National Accelerator Laboratory (FNAL), Batavia, IL (United States)
- Sponsoring Organization:
- USDOE Office of Science (SC), High Energy Physics (HEP) (SC-25)
- Grant/Contract Number:
- AC02-07CH11359
- OSTI ID:
- 1250483
- Alternate ID(s):
- OSTI ID: 22542396
- Report Number(s):
- FERMILAB-CONF--15-533-CD; arXiv:1510.03676; 1397633
- Journal Information:
- Journal of Physics. Conference Series, Journal Name: Journal of Physics. Conference Series Journal Issue: 9 Vol. 664; ISSN 1742-6588
- Publisher:
- IOP PublishingCopyright Statement
- Country of Publication:
- United States
- Language:
- English
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