Exploiting data representation for fault tolerance
Journal Article
·
· Journal of Computational Science
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
- North Carolina State Univ., Raleigh, NC (United States)
Incorrect computer hardware behavior may corrupt intermediate computations in numerical algorithms, possibly resulting in incorrect answers. Prior work models misbehaving hardware by randomly flipping bits in memory. We start by accepting this premise, and present an analytic model for the error introduced by a bit flip in an IEEE 754 floating-point number. We then relate this finding to the linear algebra concepts of normalization and matrix equilibration. In particular, we present a case study illustrating that normalizing both vector inputs of a dot product minimizes the probability of a single bit flip causing a large error in the dot product's result. Moreover, the absolute error is either less than one or very large, which allows detection of large errors. Then, we apply this to the GMRES iterative solver. We count all possible errors that can be introduced through faults in arithmetic in the computationally intensive orthogonalization phase of GMRES, and show that when the matrix is equilibrated, the absolute error is bounded above by one.
- Research Organization:
- Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States)
- Sponsoring Organization:
- USDOE National Nuclear Security Administration (NNSA); USDOE Office of Science (SC), Advanced Scientific Computing Research (ASCR)
- Grant/Contract Number:
- AC04-94AL85000
- OSTI ID:
- 1240102
- Alternate ID(s):
- OSTI ID: 1328456
- Report Number(s):
- SAND--2016-0354J; 619163
- Journal Information:
- Journal of Computational Science, Journal Name: Journal of Computational Science; ISSN 1877-7503
- Publisher:
- ElsevierCopyright Statement
- Country of Publication:
- United States
- Language:
- English
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