Vertical GaN power diodes with a bilayer edge termination
Journal Article
·
· IEEE Transactions on Electron Devices
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
- Avogy Inc., San Jose, CA (United States)
- Lehigh Univ., Bethlehem, PA (United States)
Vertical GaN power diodes with a bilayer edge termination (ET) are demonstrated. The GaN p-n junction is formed on a low threading dislocation defect density (104 - 105 cm-2) GaN substrate, and has a 15-μm-thick n-type drift layer with a free carrier concentration of 5 × 1015 cm-3. The ET structure is formed by N implantation into the p+-GaN epilayer just outside the p-type contact to create compensating defects. The implant defect profile may be approximated by a bilayer structure consisting of a fully compensated layer near the surface, followed by a 90% compensated (p) layer near the n-type drift region. These devices exhibit avalanche breakdown as high as 2.6 kV at room temperature. In addition simulations show that the ET created by implantation is an effective way to laterally distribute the electric field over a large area. This increases the voltage at which impact ionization occurs and leads to the observed higher breakdown voltages.
- Research Organization:
- Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States)
- Sponsoring Organization:
- USDOE National Nuclear Security Administration (NNSA)
- Grant/Contract Number:
- AC04-94AL85000
- OSTI ID:
- 1236482
- Report Number(s):
- SAND--2015-7150J; 603200
- Journal Information:
- IEEE Transactions on Electron Devices, Journal Name: IEEE Transactions on Electron Devices Journal Issue: 1 Vol. 63; ISSN 0018-9383
- Publisher:
- IEEECopyright Statement
- Country of Publication:
- United States
- Language:
- English
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