Packaging of solid state devices
Patent
·
OSTI ID:1175606
A package for one or more solid state devices in a single module that allows for operation at high voltage, high current, or both high voltage and high current. Low thermal resistance between the solid state devices and an exterior of the package and matched coefficient of thermal expansion between the solid state devices and the materials used in packaging enables high power operation. The solid state devices are soldered between two layers of ceramic with metal traces that interconnect the devices and external contacts. This approach provides a simple method for assembling and encapsulating high power solid state devices.
- Research Organization:
- Applied Pulsed Power, Inc., Ithaca, NY (United States)
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- FG02-00ER82948
- Assignee:
- Applied Pulsed Power, Inc. (Ithaca, NY)
- Patent Number(s):
- 6,982,482
- Application Number:
- 10/785,345
- OSTI ID:
- 1175606
- Country of Publication:
- United States
- Language:
- English
Novel packaging structures, encapsulation process and materials for matrix array over-molded flip chip CSP
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conference | March 2004 |
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