Single-transistor-clocked flip-flop

Zhao, Peiyi; Darwish, Tarek; Bayoumi, Magdy

Single-transistor-clocked flip-flop

Patent · Tue Aug 30 04:00:00 EDT 2005

OSTI ID:1175478

Zhao, Peiyi; Darwish, Tarek; Bayoumi, Magdy

The invention provides a low power, high performance flip-flop. The flip-flop uses only one clocked transistor. The single clocked transistor is shared by the first and second branches of the device. A pulse generator produces a clock pulse to trigger the flip-flop. In one preferred embodiment the device can be made as a static explicit pulsed flip-flop which employs only two clocked transistors.

Research Organization:: University of Louisiana at Lafayette, Lafayette, LA (United States)

Sponsoring Organization:: USDOE

Assignee:: University of Louisiana at Lafayette (Lafayette, LA)

Patent Number(s):: 6,937,079

Application Number:: 10/628,737

OSTI ID:: 1175478

Country of Publication:: United States

Language:: English

References (7)

Comparative delay and energy of single edge-triggered & dual edge-triggered pulsed flip-flops for high-performance microprocessors Tschanz, James; Narendra, Siva; Chen, Zhanping Proceedings of the 2001 international symposium on Low power electronics and design - ISLPED '01 https://doi.org/10.1145/383082.383121	conference	January 2001
Load-sensitive flip-flop characterizations Heo, Seongmoo; Asanovic, K. Proceedings IEEE Computer Society Workshop on VLSI 2001. Emerging Technologies for VLSI Systems https://doi.org/10.1109/IWV.2001.923144	conference	April 2001
Conditional-capture flip-flop for statistical power reduction Kong, Bai-Sun; Kim, Sam-Soo; Jun, Young-Hyun IEEE Journal of Solid-State Circuits, Vol. 36, Issue 8, p. 1263-1271 https://doi.org/10.1109/4.938376	journal	August 2001
High-speed CMOS circuit technique Yuan, J.; Svensson, C. IEEE Journal of Solid-State Circuits, Vol. 24, Issue 1 https://doi.org/10.1109/4.16303	journal	February 1989
A reduced clock-swing flip-flop (RCSFF) for 63% power reduction Kawaguchi, H.; Sakurai, T. IEEE Journal of Solid-State Circuits, Vol. 33, Issue 5 https://doi.org/10.1109/4.668997	journal	May 1998
Comparative analysis of master-slave latches and flip-flops for high-performance and low-power systems Stojanovic, V.; Oklobdzija, V. G. IEEE Journal of Solid-State Circuits, Vol. 34, Issue 4 https://doi.org/10.1109/4.753687	journal	April 1999
Activity-Sensitive Flip-Flop and Latch Selection for Reduced Energy Heo, S.; Krashinsky, R.; Asanovic, K. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 15, Issue 9 https://doi.org/10.1109/TVLSI.2007.902211	journal	September 2007

Similar Records

All-optical flip-flop and control methods thereof

Patent · Tue Mar 23 00:00:00 EDT 2010 · OSTI ID:1014459

Advanced proof-of-rotation switch

Patent · Tue Jun 29 00:00:00 EDT 1993 · OSTI ID:6350241

Radiation hardened flip flop

Patent · Tue Jan 15 00:00:00 EDT 1974 · OSTI ID:4352232

Related Subjects

42 ENGINEERING

Single-transistor-clocked flip-flop

Citation Formats

References (7)

Similar Records

Related Subjects