A UVLO Circuit in SiC Compatible With Power MOSFET Integration

Journal Article · Mon Sep 01 00:00:00 EDT 2014 · IEEE Journal of Emerging and Selected Topics in Power Electronics

DOI:https://doi.org/10.1109/jestpe.2014.2313119· OSTI ID:1136647

Glover, Michael D.; Shepherd, Paul; Francis, A. Matt; Mudholkar, Mihir; Mantooth, Homer Alan; Ericson, Milton Nance; Frank, S. Shane; Britton, Charles L.; Marlino, Laura D.; McNutt, Ty R.; Barkley, Adam; Whitaker, Bret; Lostetter, Alexander B.

The design and test of the first undervoltage lock-out circuit implemented in a low-voltage 4H silicon carbide process capable of single-chip integration with power MOSFETs is presented. The lock-out circuit, a block of the protection circuitry of a single-chip gate driver topology designed for use in a plug-in hybrid vehicle charger, was demonstrated to have rise/fall times compatible with a MOSFET switching speed of 250 kHz while operating over the targeted operating temperature range between 0°C and 200°C. Captured data show the circuit to be functional over a temperature range from -55°C to 300°C. The design of the circuit and test results is presented.

• Research Organization: Arkansas Power Electronics International (APEI), Inc., Fayetteville, AR (United States)
• Sponsoring Organization: USDOE
• DOE Contract Number: AR0000111
• OSTI ID: 1136647
• Report Number(s): DOE-APEI-01111-10
• Journal Information: IEEE Journal of Emerging and Selected Topics in Power Electronics, Vol. 2, Issue 3; ISSN 2168-6777
• Publisher: IEEE
• Country of Publication: United States
• Language: English