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Hardware device binding and mutual authentication

Patent ·
OSTI ID:1126879

Detection and deterrence of device tampering and subversion by substitution may be achieved by including a cryptographic unit within a computing device for binding multiple hardware devices and mutually authenticating the devices. The cryptographic unit includes a physically unclonable function ("PUF") circuit disposed in or on the hardware device, which generates a binding PUF value. The cryptographic unit uses the binding PUF value during an enrollment phase and subsequent authentication phases. During a subsequent authentication phase, the cryptographic unit uses the binding PUF values of the multiple hardware devices to generate a challenge to send to the other device, and to verify a challenge received from the other device to mutually authenticate the hardware devices.

Research Organization:
Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
AC04-94AL85000
Assignee:
Sandia Corporation (Albuquerque, NM)
Patent Number(s):
8,667,265
Application Number:
12/908,131
OSTI ID:
1126879
Country of Publication:
United States
Language:
English

References (10)

Protecting bus-based hardware IP by secret sharing conference January 2008
Advances in Cryptology conference August 1994
Physical unclonable functions for device authentication and secret key generation conference January 2007
AmIware: Hardware Technology Drivers of Ambient Intelligence book January 2006
A technique to build a secret key in integrated circuits for identification and authentication applications conference January 2004
A Digital 1.6 pJ/bit Chip Identification Circuit Using Process Variations journal January 2008
Physical Unclonable Functions and Public-Key Crypto for FPGA IP Protection conference August 2007
Fuzzy Extractors: How to Generate Strong Keys from Biometrics and Other Noisy Data book January 2004
Energy Scalable Universal Hashing journal December 2005
Extended abstract: The butterfly PUF protecting IP on every FPGA conference June 2008

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