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Title: Shared prefetching to reduce execution skew in multi-threaded systems

Abstract

Mechanisms are provided for optimizing code to perform prefetching of data into a shared memory of a computing device that is shared by a plurality of threads that execute on the computing device. A memory stream of a portion of code that is shared by the plurality of threads is identified. A set of prefetch instructions is distributed across the plurality of threads. Prefetch instructions are inserted into the instruction sequences of the plurality of threads such that each instruction sequence has a separate sub-portion of the set of prefetch instructions, thereby generating optimized code. Executable code is generated based on the optimized code and stored in a storage device. The executable code, when executed, performs the prefetches associated with the distributed set of prefetch instructions in a shared manner across the plurality of threads.

Inventors:
;
Publication Date:
Research Org.:
International Business Machines Corporation (Armonk, NY)
Sponsoring Org.:
USDOE
OSTI Identifier:
1087835
Patent Number(s):
8,490,071
Application Number:
12/773,454
Assignee:
International Business Machines Corporation (Armonk, NY)
DOE Contract Number:  
B554331
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Eichenberger, Alexandre E, and Gunnels, John A. Shared prefetching to reduce execution skew in multi-threaded systems. United States: N. p., 2013. Web.
Eichenberger, Alexandre E, & Gunnels, John A. Shared prefetching to reduce execution skew in multi-threaded systems. United States.
Eichenberger, Alexandre E, and Gunnels, John A. Tue . "Shared prefetching to reduce execution skew in multi-threaded systems". United States. https://www.osti.gov/servlets/purl/1087835.
@article{osti_1087835,
title = {Shared prefetching to reduce execution skew in multi-threaded systems},
author = {Eichenberger, Alexandre E and Gunnels, John A},
abstractNote = {Mechanisms are provided for optimizing code to perform prefetching of data into a shared memory of a computing device that is shared by a plurality of threads that execute on the computing device. A memory stream of a portion of code that is shared by the plurality of threads is identified. A set of prefetch instructions is distributed across the plurality of threads. Prefetch instructions are inserted into the instruction sequences of the plurality of threads such that each instruction sequence has a separate sub-portion of the set of prefetch instructions, thereby generating optimized code. Executable code is generated based on the optimized code and stored in a storage device. The executable code, when executed, performs the prefetches associated with the distributed set of prefetch instructions in a shared manner across the plurality of threads.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2013},
month = {7}
}

Patent:

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