Skip to main content
U.S. Department of Energy
Office of Scientific and Technical Information

Performing a local reduction operation on a parallel computer

Patent ·
OSTI ID:1082353
A parallel computer including compute nodes, each including two reduction processing cores, a network write processing core, and a network read processing core, each processing core assigned an input buffer. Copying, in interleaved chunks by the reduction processing cores, contents of the reduction processing cores' input buffers to an interleaved buffer in shared memory; copying, by one of the reduction processing cores, contents of the network write processing core's input buffer to shared memory; copying, by another of the reduction processing cores, contents of the network read processing core's input buffer to shared memory; and locally reducing in parallel by the reduction processing cores: the contents of the reduction processing core's input buffer; every other interleaved chunk of the interleaved buffer; the copied contents of the network write processing core's input buffer; and the copied contents of the network read processing core's input buffer.
Research Organization:
International Business Machines Corporation, Armonk, NY (United States)
Sponsoring Organization:
USDOE
Assignee:
International Business Machines Corporation (Armonk, NY)
Patent Number(s):
8,332,460
Application Number:
12/760,020
OSTI ID:
1082353
Country of Publication:
United States
Language:
English

References (14)

Efficient algorithms for all-to-all communications in multiport message-passing systems journal January 1997
Efficient MPI Collective Operations for Clusters in Long-and-Fast Networks conference September 2006
Computing parallel prefix and reduction using coterie structures
  • Herbordt, M. C.; Weems, C. C.
  • [1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation, [Proceedings 1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation https://doi.org/10.1109/FMPC.1992.234895
conference January 1992
Coprocessor design to support MPI primitives in configurable multiprocessors journal April 2007
Interleaved all-to-all reliable broadcast on meshes and hypercubes journal May 1994
Optimization of MPI collectives on clusters of large-scale SMP's conference January 1999
Bandwidth Efficient All-reduce Operation on Tree Topologies conference March 2007
Extending the message passing interface (MPI) conference January 1995
Universality of mixed action extrapolation formulae journal April 2009
Building packet buffers using interleaved memories conference January 2005
Optimizing threaded MPI execution on SMP clusters conference January 2001
DADO: A tree-structured machine architecture for production systems report March 1982
An All-Reduce Operation in Star Networks Using All-to-All Broadcast Communication Pattern book January 2005
Computing the Hough transform on a scan line array processor (image processing) journal March 1989

Similar Records

Performing a local reduction operation on a parallel computer
Patent · Tue Jun 04 00:00:00 EDT 2013 · OSTI ID:1084349

Internode data communications in a parallel computer
Patent · Tue Sep 03 00:00:00 EDT 2013 · OSTI ID:1092903

Internode data communications in a parallel computer
Patent · Mon Feb 10 23:00:00 EST 2014 · OSTI ID:1119575

Related Subjects