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Tuple spaces in hardware for accelerated implicit routing

Journal Article ·
Abstract Not Provided
Research Organization:
Los Alamos National Laboratory (LANL)
Sponsoring Organization:
DOE
DOE Contract Number:
AC52-06NA25396
OSTI ID:
1063955
Report Number(s):
LA-UR-11-02785; LA-UR-11-2785
Country of Publication:
United States
Language:
English

References (7)

Entering the petaflop era: The architecture and performance of Roadrunner conference November 2008
Generative communication in Linda journal January 1985
NIC-based reduction algorithms for large-scale clusters journal January 2006
Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs journal October 2006
Dynamo: amazon's highly available key-value store conference January 2007
Towards the measurement of tuple space performance journal December 2005
Hardware implementation of MPI_Barrier on an FPGA cluster conference August 2009

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