A low-power wave union TDC implemented in FPGA
Conference
·
· Submitted to JINST
OSTI ID:1033670
A low-power time-to-digital convertor (TDC) for an application inside a vacuum has been implemented based on the Wave Union TDC scheme in a low-cost field programmable gate array (FPGA) device. Bench top tests have shown that a time measurement resolution better than 30 ps (standard deviation of time differences between two channels) is achieved. Special firmware design practices are taken to reduce power consumption. The measurements indicate that with 32 channels fitting in the FPGA device, the power consumption on the FPGA core voltage is approximately 9.3 mW/channel and the total power consumption including both core and I/O banks is less than 27 mW/channel.
- Research Organization:
- Fermi National Accelerator Laboratory (FNAL), Batavia, IL
- Sponsoring Organization:
- DOE Office of Science
- DOE Contract Number:
- AC02-07CH11359
- OSTI ID:
- 1033670
- Report Number(s):
- FERMILAB-CONF-11-557-E
- Conference Information:
- Journal Name: Submitted to JINST
- Country of Publication:
- United States
- Language:
- English
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