Microelectronics package design using experimentally-validated modeling and simulation.
Conference
·
OSTI ID:1030287
Packaging high power radio frequency integrated circuits (RFICs) in low temperature cofired ceramic (LTCC) presents many challenges. Within the constraints of LTCC fabrication, the design must provide the usual electrical isolation and interconnections required to package the IC, with additional consideration given to RF isolation and thermal management. While iterative design and prototyping is an option for developing RFIC packaging, it would be expensive and most likely unsuccessful due to the complexity of the problem. To facilitate and optimize package design, thermal and mechanical simulations were used to understand and control the critical parameters in LTCC package design. The models were validated through comparisons to experimental results. This paper summarizes an experimentally-validated modeling approach to RFIC package design, and presents some results and key findings.
- Research Organization:
- Sandia National Laboratories
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- AC04-94AL85000
- OSTI ID:
- 1030287
- Report Number(s):
- SAND2010-7842C
- Country of Publication:
- United States
- Language:
- English
Similar Records
Bi-level microelectronic device package with an integral window
Microelectronic device package with an integral window
Single level microelectronic device package with an integral window
Patent
·
Mon Jan 05 23:00:00 EST 2004
·
OSTI ID:1174667
Microelectronic device package with an integral window
Patent
·
Mon Dec 31 23:00:00 EST 2001
·
OSTI ID:874408
Single level microelectronic device package with an integral window
Patent
·
Mon Dec 08 23:00:00 EST 2003
·
OSTI ID:1174618