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Overview of the Scalable Coherent Interface, IEEE STD 1596 (SCI)

Conference ·
OSTI ID:10162447
 [1];  [2];  [3]
  1. Stanford Linear Accelerator Center, Menlo Park, CA (United States)
  2. Apple Computer, Cupertino, CA (United States)
  3. Hewlett-Packard Co., Palo Alto, CA (United States)

The Scalable Coherent Interface standard defines a new generation of interconnection that spans the full range from supercomputer memory `bus` to campus-wide network. SCI provides bus-like services and a shared-memory software model while using an underlying, packet protocol on many independent communication links. Initially these links are 1 GByte/s (wires) and 1 GBit/s (fiber), but the protocol scales well to future faster or lower-cost technologies. The interconnect may use switches, meshes, and rings. The SCI distributed-shared-memory model is simple and versatile, enabling for the first time a smooth integration of highly parallel multiprocessors, workstations, personal computers, I/O, networking and data acquisition.

Research Organization:
Stanford Linear Accelerator Center, Menlo Park, CA (United States)
Sponsoring Organization:
USDOE, Washington, DC (United States)
DOE Contract Number:
AC03-76SF00515
OSTI ID:
10162447
Report Number(s):
SLAC-PUB--5967; CONF-921005--34; ON: DE93015247
Country of Publication:
United States
Language:
English

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