Implications of a PIM architectural model for MPI.
- University of Notre Dame, Notre Dame, IN
Memory may be the only system component that is more commoditized than a microprocessor. To simultaneously exploit this and address the impending memory wall, processing in memory (PIM) research efforts are considering ways to move processing into memory without significantly increasing the cost of the memory. As such, PIM devices may become the basis for future commodity clusters. Although these PIM devices may leverage new computational paradigms such as hardware support for multi-threading and traveling threads, they must provide support for legacy programming models if they are to supplant commodity clusters. This paper presents a prototype implementation of MPI over a traveling thread mechanism called parcels. A performance analysis indicates that the direct hardware support of a traveling thread model can lead to an efficient, lightweight MPI implementation.
- Research Organization:
- Sandia National Laboratories (SNL), Albuquerque, NM, and Livermore, CA (United States)
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- AC04-94AL85000
- OSTI ID:
- 1002079
- Report Number(s):
- SAND2003-2767C; TRN: US201102%%586
- Resource Relation:
- Conference: Proposed for presentation at the IEEE International Conference on Cluster Computing 2003 held December 1-4, 2003 in Hong Kong.
- Country of Publication:
- United States
- Language:
- English
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