Optimized synthesis of concurrently checked controllers
- Institut National Polytechnique de Grenoble, CSI Lab., 38000 Grenoble (FR)
Dedicated controllers (or FSM's) with concurrent checking capabilities are of prime importance in highly dependable applications. This paper presents a new method for introducing on-line test facilities in a controller with a very low overhead. This on-line test consists in detecting illegal paths in the control flow graph. These illegal paths may be due either to permanent faults or to transient errors. The state code flow is compacted through polynomial division. An implicit justifying signature method is applied at the state code level and ensures identical signatures before each join node of the control flow graph. The signatures are then independent of the path followed previously in the graph and the comparison to reference data is greatly facilitated. This property is obtained by a clever state assignment, nearly without area overhead. The controllers can then be checked by signature analysis, either by a built-in monitor or by an external checker.
- OSTI ID:
- 6934613
- Journal Information:
- IEEE Transactions on Computers (Institute of Electrical and Electronics Engineers); (USA), Vol. 39:4; ISSN 0018-9340
- Country of Publication:
- United States
- Language:
- English
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