Self-checking VLSI reduced instruction set computers
The reduced instruction set computer (RISC) is the architecture that dominates today's very large scale integrated (VLSI) processor designs. As the VLSI technology advances, the complexity of a VLSI processor makes design and testing of a VLSI processor very difficult. The self-checking processor design may help to solve these problems, since a self-checking processor can be used as a basic component in a fault-tolerant computer system for the end-user and it can simplify the testing complexity for the manufacturer. In this dissertation, several techniques, that enhance the efficiency of a self-checking processor, are presented. First, a very flexible new design scheme for TSC Berger code checker is given. This design can achieve a faster speed with moderate increase in hardware. A novel scheme to designing a self-checking arithmetic and logic unit (ALU) is also presented. Currently, the only design that can be applied to a self-checking processor design is the two-rail encoded ALU, which needs twice the hardware requirement. The novel scheme uses the Berger code to encode the ALU with the check prediction technique. Theorems and design for Berger check prediction ALU are presented. With The Bergen check prediction ALU, the entire data path can be encoded in a Berger code. This, in turns, reduces the number of checkers in the data path and the hardware requirement. An example design of self-checking RISC processor, called SCRISC, is presented. The SCRISC is designed based on the Berger check prediction ALU. Also, the self-checking issues, such as opcode binary assignments, interfacing and applications to fault-tolerant computer systems, are discussed.
- Research Organization:
- University of Southwestern Louisiana, Lafayette, LA (USA)
- OSTI ID:
- 6223319
- Resource Relation:
- Other Information: Thesis (Ph.D)
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
SEMICONDUCTOR STORAGE DEVICES
DESIGN
AUTOMATION
COMPUTER ARCHITECTURE
FAULT TOLERANT COMPUTERS
MATHEMATICAL LOGIC
PERFORMANCE TESTING
COMPUTERS
DIGITAL COMPUTERS
MEMORY DEVICES
SEMICONDUCTOR DEVICES
TESTING
990200* - Mathematics & Computers