Digital time delay
Method and apparatus are provided for generating an output pulse following a trigger pulse at a time delay interval preset with a resolution which is high relative to a low resolution available from supplied clock pulses. A first lumped constant delay provides a first output signal at predetermined interpolation intervals corresponding to the desired high resolution time interval. Latching circuits latch the high resolution data to form a first synchronizing data set. A selected time interval has been preset to internal counters and corrected for circuit propagation delay times having the same order of magnitude as the desired high resolution. Internal system clock pulses count down the counters to generate an internal pulse delayed by an internal which is functionally related to the preset time interval. A second LCD corrects the internal signal with the high resolution time delay. A second internal pulse is then applied to a third LCD to generate a second set of synchronizing data which is complementary with the first set of synchronizing data for presentation to logic circuits. The logic circuits further delay the internal output signal with the internal pulses. The final delayed output signal thereafter enables the output pulse generator to produce the desired output pulse at the preset time delay interval following input of the trigger pulse.
- Research Organization:
- Los Alamos National Laboratory (LANL), Los Alamos, NM (United States)
- DOE Contract Number:
- W-7405-ENG-36
- Assignee:
- Dept. of Energy
- Application Number:
- ON: DE87007245
- OSTI ID:
- 6759992
- Resource Relation:
- Other Information: Portions of this document are illegible in microfiche products
- Country of Publication:
- United States
- Language:
- English
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