A 1-kbit Josephson random access memory using variable threshold cells

Journal Article · Tue Aug 01 00:00:00 EDT 1989 · IEEE (Institute of Electrical and Electronics Engineers) Journal of Solid State Circuits; (USA)

DOI:https://doi.org/10.1109/4.34089· OSTI ID:5290134

Kurosawa, I; Nakagawa, H; Kosaka, S; Aoyagi, M; Takada, S ^[1]

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1. Electrotechnical Lab., 1-1-4 Umezono, Tsukuba, Ibaraki 305 (JP)

A new Josephson random access memory (RAM) based on variable threshold memory cells is demonstrated. The cell has the advantages of simple structure and small size. In order to achieve nondestructive readout (NDRO), rewriting is carried out with peripheral circuits consisting of latching logic gates without any superconducting loop. Experimental results show no failure in the 1028 logic gates of the peripheral circuits, and only a 2-percent bit failure in the cell plane of 1024 bits.

• OSTI ID: 5290134
• Journal Information: IEEE (Institute of Electrical and Electronics Engineers) Journal of Solid State Circuits; (USA), Vol. 24:4; ISSN 0018-9200
• Country of Publication: United States
• Language: English

Related Subjects

75 CONDENSED MATTER PHYSICS
SUPERCONDUCTIVITY AND SUPERFLUIDITY
JOSEPHSON JUNCTIONS
DESIGN
LOGIC CIRCUITS
FABRICATION
ALUMINIUM OXIDES
MATERIALS TESTING
NIOBIUM OXIDES
NONDESTRUCTIVE TESTING
POWER SUPPLIES
SIZE
SUPERCONDUCTIVITY
TECHNOLOGY ASSESSMENT
TUNNEL EFFECT
ALUMINIUM COMPOUNDS
CHALCOGENIDES
ELECTRIC CONDUCTIVITY
ELECTRICAL PROPERTIES
ELECTRONIC CIRCUITS
ELECTRONIC EQUIPMENT
EQUIPMENT
JUNCTIONS
NIOBIUM COMPOUNDS
OXIDES
OXYGEN COMPOUNDS
PHYSICAL PROPERTIES
REFRACTORY METAL COMPOUNDS
SUPERCONDUCTING JUNCTIONS
TESTING
TRANSITION ELEMENT COMPOUNDS
426001* - Engineering- Superconducting Devices & Circuits- (1990-)