HIGH-SPEED TRANSISTORIZED ADDER FOR A DIGITAL COMPUTER

Journal Article · Thu Dec 01 00:00:00 EST 1960 · IRE Trans. on Electronic Computers

DOI:https://doi.org/10.1109/TEC.1960.5219885· OSTI ID:4080441

Salter, F

An adder is described that has been developed for the Floating Indexed Point Arithrnetic Unit, FLIP, to be used in conjunction with GEORGE, the existing computer built at Argonne National Laboratory. The logic of the highspeed adder and the special circuits required are presented. The adder is parallel, and its high speed is made possible by reducing the carry propagation time. Each bit of the adder contributes one transistor to make up a tall AND gate which reduces the carry propagation time to 0.2 mu sec. With this high-speed carry propagation and rather common RCTL transistor circuitry, it is possible to complete an addition in less than 0.25 mu sec. (auth)

• Research Organization: Argonne National Lab., Ill.
• Sponsoring Organization: USDOE
• NSA Number: NSA-15-011442
• OSTI ID: 4080441
• Journal Information: IRE Trans. on Electronic Computers, Vol. Vol: EC-9; Other Information: Orig. Receipt Date: 31-DEC-61
• Country of Publication: Country unknown/Code not available
• Language: English

Related Subjects

MATHEMATICS AND COMPUTERS
COMPUTERS
PLANNING