Growth of coincident site lattice matched semiconductor layers and devices on crystalline substrates

Norman, Andrew G; Ptak, Aaron J

Title: Growth of coincident site lattice matched semiconductor layers and devices on crystalline substrates

Patent · Tue Aug 13 00:00:00 EDT 2013

OSTI ID:1092976

Norman, Andrew G; Ptak, Aaron J

Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a substrate having a crystalline surface with a known lattice parameter (a). The method further includes growing a crystalline semiconductor layer on the crystalline substrate surface by coincident site lattice matched epitaxy, without any buffer layer between the crystalline semiconductor layer and the crystalline surface of the substrate. The crystalline semiconductor layer will be prepared to have a lattice parameter (a') that is related to the substrate lattice parameter (a). The lattice parameter (a') maybe related to the lattice parameter (a) by a scaling factor derived from a geometric relationship between the respective crystal lattices.

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Research Organization:: National Renewable Energy Laboratory (NREL), Golden, CO (United States)

Sponsoring Organization:: USDOE

DOE Contract Number:: AC36-08GO28308

Assignee:: Alliance for Sustainable Energy, LLC (Golden, CO)

Patent Number(s):: 8,507,365

Application Number:: 12/643,127

OSTI ID:: 1092976

Country of Publication:: United States

Language:: English

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