Apparatus for fixing latency

Patent · Tue Sep 08 00:00:00 EDT 2009

OSTI ID:988830

Hall, David R ^[1]; Bartholomew, David B ^[2]; Moon, Justin ^[3]; Koehler, Roger O ^[1]

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1. Provo, UT
2. Springville, UT
3. Bountiful, UT

An apparatus for fixing computational latency within a deterministic region on a network comprises a network interface modem, a high priority module and at least one deterministic peripheral device. The network interface modem is in communication with the network. The high priority module is in communication with the network interface modem. The at least one deterministic peripheral device is connected to the high priority module. The high priority module comprises a packet assembler/disassembler, and hardware for performing at least one operation. Also disclosed is an apparatus for executing at least one instruction on a downhole device within a deterministic region, the apparatus comprising a control device, a downhole network, and a downhole device. The control device is near the surface of a downhole tool string. The downhole network is integrated into the tool string. The downhole device is in communication with the downhole network.

• Research Organization: Novatek Engineering
• Sponsoring Organization: USDOE
• DOE Contract Number: FC26-01NT41229
• Assignee: IntelliServ International Holding, Ltd (KY)
• Patent Number(s): 7,586,934
• Application Number: 10/710,882
• OSTI ID: 988830
• Country of Publication: United States
• Language: English

Related Subjects

97 MATHEMATICS AND COMPUTING