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Title: Single-poly EEPROM cell with lightly doped MOS capacitors

Patent ·
OSTI ID:981823

An Electrically Erasable Programmable Read Only Memory (EEPROM) memory cell and a method of operation are disclosed for creating an EEPROM memory cell in a standard CMOS process. A single polysilicon layer is used in combination with lightly doped MOS capacitors. The lightly doped capacitors employed in the EEPROM memory cell can be asymmetrical in design. Asymmetrical capacitors reduce area. Further capacitance variation caused by inversion can also be reduced by using multiple control capacitors. In addition, the use of multiple tunneling capacitors provides the benefit of customized tunneling paths.

Research Organization:
National Energy Technology Laboratory (NETL), Pittsburgh, PA, Morgantown, WV (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
FC26-03NT41834
Assignee:
Honeywell International, Inc. (Morristown, NJ)
Patent Number(s):
7,378,705
Application Number:
11/217,829
OSTI ID:
981823
Country of Publication:
United States
Language:
English

References (8)

Temperature dependence of Fowler-Nordheim injection from accumulated n-type silicon into silicon dioxide journal May 1993
Modeling of the intrinsic retention characteristics of FLOTOX EEPROM cells under elevated temperature conditions journal April 1995
A new extrapolation law for data-retention time-to-failure of nonvolatile memories journal May 1999
A single-poly EEPROM cell in SIMOX technology for high-temperature applications up to 250/spl deg/C journal November 1997
A 1-Kbit EEPROM in SIMOX technology for high-temperature applications up to 250/spl deg/C journal October 2000
Experimental and theoretical investigation of nonvolatile memory data-retention journal July 1999
A single poly EEPROM cell structure for use in standard CMOS processes journal March 1994
An experimental 5-V-only 256-kbit CMOS EEPROM with a high-performance single-polysilicon cell journal October 1986

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