Sparse matrix-vector multiplication on a reconfigurable supercomputer

Journal Article · Tue Jan 01 00:00:00 EST 2008 · ACM Transactions on Reconfigurable Technology and Systems (TRETS)

DOI:https://doi.org/10.1109/FCCM.2008.53· OSTI ID:962276

Dubois, David H ^[1]; Dubois, Andrew J ^[1]; Boorman, Thomas M ^[1]; Connor, Carolyn M ^[1]; Poole, Steve ^[2]

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1. Los Alamos National Laboratory
2. ORNL

Double precision floating point Sparse Matrix-Vector Multiplication (SMVM) is a critical computational kernel used in iterative solvers for systems of sparse linear equations. The poor data locality exhibited by sparse matrices along with the high memory bandwidth requirements of SMVM result in poor performance on general purpose processors. Field Programmable Gate Arrays (FPGAs) offer a possible alternative with their customizable and application-targeted memory sub-system and processing elements. In this work we investigate two separate implementations of the SMVM on an SRC-6 MAPStation workstation. The first implementation investigates the peak performance capability, while the second implementation balances the amount of instantiated logic with the available sustained bandwidth of the FPGA subsystem. Both implementations yield the same sustained performance with the second producing a much more efficient solution. The metrics of processor and application balance are introduced to help provide some insight into the efficiencies of the FPGA and CPU based solutions explicitly showing the tight coupling of the available bandwidth to peak floating point performance. Due to the FPGA's ability to balance the amount of implemented logic to the available memory bandwidth it can provide a much more efficient solution. Finally, making use of the lessons learned implementing the SMVM, we present an fully implemented nonpreconditioned Conjugate Gradient Algorithm utilizing the second SMVM design.

• Research Organization: Los Alamos National Laboratory (LANL), Los Alamos, NM (United States)
• Sponsoring Organization: USDOE
• DOE Contract Number: AC52-06NA25396
• OSTI ID: 962276
• Report Number(s): LA-UR-08-06989; LA-UR-08-6989; TRN: US200919%%40
• Journal Information: ACM Transactions on Reconfigurable Technology and Systems (TRETS), Journal Name: ACM Transactions on Reconfigurable Technology and Systems (TRETS)
• Country of Publication: United States
• Language: English

Related Subjects

97 MATHEMATICS AND COMPUTING
ACCURACY
ALGORITHMS
DESIGN
IMPLEMENTATION
KERNELS
MATRICES
METRICS
PERFORMANCE
PROCESSING
SUPERCOMPUTERS