Fast Low-Cost Multiple Sensor Readout System

Patent · Tue Apr 06 00:00:00 EDT 2004

OSTI ID:880014

Carter-Lewis, David ^[1]; Krennich, Frank ^[1]; Le Bohec, Stephane ^[1]; Petry, Dirk ^[2]; Sleege, Gary ^[3]

---

1. Ames, IA
2. College Park, MD
3. Marshalltown, IA

A low resolution data acquisition system is presented. The data acquisition system has a plurality of readout modules serially connected to a controller. Each readout module has a FPGA in communication with analog to digital (A/D) converters, which are connected to sensors. The A/D converter has eight bit or lower resolution. The FPGA detects when a command is addressed to it and commands the A/D converters to convert analog sensor data into digital data. The digital data is sent on a high speed serial communication bus to the controller. A graphical display is used in one embodiment to indicate if a sensor reading is outside of a predetermined range.

• Research Organization: Iowa State Univ., Ames, IA (United States)
• DOE Contract Number: FG02-91ER40634
• Assignee: Iowa State University Research Foundation, Inc. (Ames, IA)
• Patent Number(s): US 6,717,541
• Application Number: 10/425495
• OSTI ID: 880014
• Country of Publication: United States
• Language: English