Semiconductor P-I-N detector

Patent · Mon Jan 01 00:00:00 EST 2001

OSTI ID:873828

Sudharsanan, Rengarajan ^[1]; Karam, Nasser H ^[2]

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1. 53 Timber Line Dr., Nashua, NH 03062
2. 577 Lowell St., Lexington, MA 02173

A semiconductor P-I-N detector including an intrinsic wafer, a P-doped layer, an N-doped layer, and a boundary layer for reducing the diffusion of dopants into the intrinsic wafer. The boundary layer is positioned between one of the doped regions and the intrinsic wafer. The intrinsic wafer can be composed of CdZnTe or CdTe, the P-doped layer can be composed of ZnTe doped with copper, and the N-doped layer can be composed of CdS doped with indium. The boundary layers is formed of an undoped semiconductor material. The boundary layer can be deposited onto the underlying intrinsic wafer. The doped regions are then typically formed by a deposition process or by doping a section of the deposited boundary layer.

• Research Organization: Spire Corp., Bedford, MA (United States)
• DOE Contract Number: FG02-94ER81869
• Assignee: Sudharsanan, Rengarajan (53 Timber Line Dr., Nashua, NH 03062);Karam, Nasser H. (577 Lowell St., Lexington, MA 02173)
• Patent Number(s): US 6255708
• OSTI ID: 873828
• Country of Publication: United States
• Language: English

Related Subjects

semiconductor
p-i-n
detector
including
intrinsic
wafer
p-doped
layer
n-doped
boundary
reducing
diffusion
dopants
positioned
doped
regions
composed
cdznte
cdte
znte
copper
cds
indium
layers
formed
undoped
material
deposited
underlying
typically
deposition
process
doping
section
intrinsic wafer
semiconductor material
deposition process
boundary layer
doped layer
boundary layers
doped regions
semiconductor p-i-n
detector including
p-i-n detector
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