Apparatus and method for defect testing of integrated circuits
- Placitas, NM
An apparatus and method for defect and failure-mechanism testing of integrated circuits (ICs) is disclosed. The apparatus provides an operating voltage, V.sub.DD, to an IC under test and measures a transient voltage component, V.sub.DDT, signal that is produced in response to switching transients that occur as test vectors are provided as inputs to the IC. The amplitude or time delay of the V.sub.DDT signal can be used to distinguish between defective and defect-free (i.e. known good) ICs. The V.sub.DDT signal is measured with a transient digitizer, a digital oscilloscope, or with an IC tester that is also used to input the test vectors to the IC. The present invention has applications for IC process development, for the testing of ICs during manufacture, and for qualifying ICs for reliability.
- Research Organization:
- Sandia National Laboratories (SNL), Albuquerque, NM, and Livermore, CA (United States)
- DOE Contract Number:
- AC04-94AL85000
- Assignee:
- Sandia Corporation (Albuquerque, NM)
- Patent Number(s):
- US 6031386
- OSTI ID:
- 872882
- Country of Publication:
- United States
- Language:
- English
Similar Records
Ion-beam apparatus and method for analyzing and controlling integrated circuits
Thermally-induced voltage alteration for integrated circuit analysis
Related Subjects
method
defect
testing
integrated
circuits
failure-mechanism
ics
disclosed
provides
operating
voltage
dd
measures
transient
component
ddt
signal
produced
response
switching
transients
occur
vectors
provided
inputs
amplitude
time
delay
distinguish
defective
defect-free
measured
digitizer
digital
oscilloscope
tester
input
applications
process
manufacture
qualifying
reliability
operating voltage
apparatus provides
time delay
integrated circuits
integrated circuit
transient digitizer
transient voltage
/324/