Method for photolithographic definition of recessed features on a semiconductor wafer utilizing auto-focusing alignment

Patent · Thu Jan 01 00:00:00 EST 1998

OSTI ID:871726

Farino, Anthony J ^[1]; Montague, Stephen ^[1]; Sniegowski, Jeffry J ^[1]; Smith, James H ^[1]; McWhorter, Paul J ^[1]

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1. Albuquerque, NM

A method is disclosed for photolithographically defining device features up to the resolution limit of an auto-focusing projection stepper when the device features are to be formed in a wafer cavity at a depth exceeding the depth of focus of the stepper. The method uses a focusing cavity located in a die field at the position of a focusing light beam from the auto-focusing projection stepper, with the focusing cavity being of the same depth as one or more adjacent cavities wherein a semiconductor device is to be formed. The focusing cavity provides a bottom surface for referencing the focusing light beam and focusing the stepper at a predetermined depth below the surface of the wafer, whereat the device features are to be defined. As material layers are deposited in each device cavity to build up a semiconductor structure such as a microelectromechanical system (MEMS) device, the same material layers are deposited in the focusing cavity, raising the bottom surface and re-focusing the stepper for accurately defining additional device features in each succeeding material layer. The method is especially applicable for forming MEMS devices within a cavity or trench and integrating the MEMS devices with electronic circuitry fabricated on the wafer surface.

• Research Organization: Sandia National Laboratories (SNL), Albuquerque, NM, and Livermore, CA (United States)
• DOE Contract Number: AC04-94AL85000
• Assignee: Sandia Corporation (Albuquerque, NM)
• Patent Number(s): US 5783340
• OSTI ID: 871726
• Country of Publication: United States
• Language: English

Related Subjects

method
photolithographic
definition
recessed
features
semiconductor
wafer
utilizing
auto-focusing
alignment
disclosed
photolithographically
defining
device
resolution
limit
projection
stepper
formed
cavity
depth
exceeding
focus
focusing
located
die
field
position
light
beam
adjacent
cavities
provides
bottom
surface
referencing
predetermined
below
whereat
defined
material
layers
deposited
build
structure
microelectromechanical
mems
raising
re-focusing
accurately
additional
succeeding
layer
especially
applicable
forming
devices
trench
integrating
electronic
circuitry
fabricated
material layer
electronic circuit
semiconductor wafer
light beam
semiconductor device
electronic circuitry
bottom surface
material layers
mems device
wafer surface
predetermined depth
semiconductor structure
device features
/430/356/438/