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Title: Process for forming synapses in neural networks and resistor therefor

Patent ·
OSTI ID:870526

Customizable neural network in which one or more resistors form each synapse. All the resistors in the synaptic array are identical, thus simplifying the processing issues. Highly doped, amorphous silicon is used as the resistor material, to create extremely high resistances occupying very small spaces. Connected in series with each resistor in the array is at least one severable conductor whose uppermost layer has a lower reflectivity of laser energy than typical metal conductors at a desired laser wavelength.

Research Organization:
Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
DOE Contract Number:
W-7405-ENG-48
Assignee:
Regents of University of California (Oakland, CA)
Patent Number(s):
US 5538915
OSTI ID:
870526
Country of Publication:
United States
Language:
English

References (3)

A laser direct write double-level-metal technology for rapid fabrication conference January 1990
An introduction to computing with neural nets journal January 1987
Resistive synaptic interconnects for electronic neural networks
  • Lamb, J. L.; Thakoor, A. P.; Moopenn, A.
  • Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films, Vol. 5, Issue 4 https://doi.org/10.1116/1.574607
journal July 1987