SLAC Scanner Processor applications in the data acquisition system for the upgraded Mark II detector

Conference · Sun Sep 01 00:00:00 EDT 1985

OSTI ID:6337474

Barklow, T; Glanzman, T; Lankford, A J; Riles, K

The SLAC Scanner Processor is a general purpose, programmable FASTBUS crate/cable master/slave module. This device plays a central role in the readout, buffering and pre-processing of data from the upgraded Mark II detector's new central drift chamber. In addition to data readout, the SSPs assist in a variety of other services, such as detector calibration, FASTBUS system management, FASTBUS system initialization and verification, and FASTBUS module testing. 9 refs., 1 fig., 2 tabs.

• Research Organization: Stanford Linear Accelerator Center, Menlo Park, CA (USA)
• DOE Contract Number: AC03-76SF00515
• OSTI ID: 6337474
• Report Number(s): SLAC-PUB-3781; CONF-851009-14; ON: DE86002939
• Resource Relation: Conference: IEEE nuclear science symposium, San Francisco, CA, USA, 23 Oct 1985
• Country of Publication: United States
• Language: English

Related Subjects

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY
DATA ACQUISITION SYSTEMS
DESIGN
DRIFT CHAMBERS
DATA ACQUISITION
CALIBRATION
FASTBUS SYSTEM
MEASURING INSTRUMENTS
MULTIWIRE PROPORTIONAL CHAMBERS
PROPORTIONAL COUNTERS
RADIATION DETECTORS
440104* - Radiation Instrumentation- High Energy Physics Instrumentation