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Title: Vertical gradient freeze GaAs: Growth and electrical properties

Technical Report ·
DOI:https://doi.org/10.2172/6055130· OSTI ID:6055130

We have investigated the influence of silicon contamination prevention methods on the electrical properties of GaAs grown by the Vertical Gradient Freeze (VGF) technique. We report the effectiveness of these methods for GaAs crystals grown from two different starting materials: n-type with resistivities in the range of 10/sup /minus/1/ to 10/sup 3/ ..cap omega..-cm and semi-insulating (SI) with a resistivity of 10/sup 8/ ..cap omega..-cm. We have found that the impurities in the starting materials, specifically boron, carbon and silicon, have an effect on the ability to control silicon contamination with methods that have been reported previously in the literature. We also report the attainment of SI crystals using a PBN crucible, a SI charge and B/sub 2/O/sub 3/ encapsulation. 61 refs., 13 figs., 7 tabs.

Research Organization:
Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States)
DOE Contract Number:
AC03-76SF00098
OSTI ID:
6055130
Report Number(s):
LBL-27271; ON: DE89014894
Resource Relation:
Other Information: Thesis (M.S.). Portions of this document are illegible in microfiche products
Country of Publication:
United States
Language:
English