Nanometer scale nonvolatile memory device and method for storing binary and quantum memory states

Xiao, Jun; Lindenberg, Aaron

Title: Nanometer scale nonvolatile memory device and method for storing binary and quantum memory states

Patent · Tue Jun 07 00:00:00 EDT 2022

OSTI ID:1893014

Xiao, Jun; Lindenberg, Aaron

Example implementations include an electronic memory device with a metallic layer having a first planar crystalline structure, a first encapsulating layer including an encapsulating material having a second planar crystalline structure, and disposed adjacent to a first planar surface of the metallic layer, and a second encapsulating layer including the encapsulating material, and disposed adjacent to a second planar surface of the metallic layer. Example implementations also include a method of depositing graphite crystals onto a substrate to form a gate bottom layer, depositing BN crystals onto the graphite bottom layer to form a BN bottom layer, depositing tungsten ditelluride (WTe2) crystals onto the BN bottom layer to form a metallic layer, depositing the BN crystals onto the BN bottom layer and the metallic layer to form a BN top layer, and depositing the graphite crystals onto the BN top layer to form a gate top layer.

View Patent

Cite

Export

Save

Research Organization:: SLAC National Accelerator Laboratory (SLAC), Menlo Park, CA (United States)

Sponsoring Organization:: USDOE

DOE Contract Number:: AC02-76SF00515

Assignee:: The Board of Trustees of the Leland Stanford Junior University (Stanford, CA)

Patent Number(s):: 11,355,697

Application Number:: 17/103,710

OSTI ID:: 1893014

Resource Relation:: Patent File Date: 11/24/2020

Country of Publication:: United States

Language:: English

References (30)

Method For Generating A Three-Dimensional NAND Memory With Mono-Crystalline Channels Using Sacrificial Material Roizin, Yakov; Strum, Avi https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20130052803 US Patent Application 13/365228; 20130052803 A1	patent-application	February 2013
Vertical 1T ferroelectric memory cells, memory arrays and methods of forming the same Mine, Teruyuki; Petti, Christopher J. https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20190237470 US Patent Application 15/884725; 20190237470	patent-application	August 2019
Device Comprising Polymorphic Resistive Cells Riel, Heike E.; Pushp, Aakash https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20200035296 US Patent Application 16/043254; 20200035296 A1	patent-application	January 2020
Plastic Crystal Thermal Interface Materials Gong, Shushan; Santana Klein, Iolanda; Tejeda Ferrari, Marely Estefania https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20210143082 US Patent Application 16/678024; 20210143082 A1	patent-application	May 2021
Nanocoils, Systems And Methods For Fabricating Nanocoils Storaska, Garrett A.; Howell, Robert S. https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20070123054 US Patent Application 11/524244; 20070123054 A1	patent-application	May 2007
Multi-stack three-dimensional memory devices Xiao, Li; Hu, Bin https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/10600781 US Patent Document 10,600,781	patent	March 2020
Semiconductor and optoelectronic devices Or-Bach, Zvi; Sekar, Deepak C. https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8163581 US Patent Document 8,163,581	patent	April 2012
Three-Dimensional NAND Memory With Stacked Mono-Crystalline Channels Roizin, Yakov; Strum, Avi https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20130051150 US Patent Application 13/365225; 20130051150 A1	patent-application	February 2013
Semiconductor device including interconnected package on package Chiu, Chin-Tien; Takiar, Hem https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20180005974 US Patent Application 15/619812; 20180005974	patent-application	January 2018
Three-Dimensional Memory Device Containing Aluminum-Silicon Word Lines and Methods of Manufacturing the Same Rabkin, Peter; Higashitani, Masaaki; Pachamuthu, Jayavel https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20200006364 US Patent Application 16/019961; 20200006364 A1	patent-application	January 2020
Method For Surface Treatment Of Aluminum Alloy Ando, Katsutoshi; Nisato, Fumiaki; Shinomiya, Mitsuo https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060113005 US Patent Application 11/288798; 20060113005 A1	patent-application	June 2006
Magnetoresistance effect element Iwasaki, Hitoshi; Ohsawa, Yuichi; Kondoh, Reiko https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6395388 US Patent Document 6,395,388	patent	May 2002
Select transistors with tight threshold voltage in 3D memory Pang, Liang; Pachamuthu, Jayavel; Dong, Yingda https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/9941293 US Patent Document 9,941,293	patent	April 2018
Information device and method for performing information processing Mihara, Takashi; Furumiya, Shigeru https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20140119167 US Patent Application 14/129203; 20140119167	patent-application	May 2014
Memory Cell, Memory Device, and Methods of Forming the Same Fukuzawa, Hideaki; Yu, Jun; Han, Michael https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20210104659 US Patent Application 16/072965; 20210104659 A1	patent-application	April 2021
Tapered cell profile and fabrication Redaelli, Andrea; Conti, Anna Maria; Pirovano, Agostino https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20190252605 US Patent Application 15/893100; 20190252605	patent-application	August 2019
Resistive memory device having a template layer Desu, Seshubabu https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/10319907 US Patent Document 10,319,907	patent	June 2019
RAMO4 substrate and method of manufacture thereof, and group III nitride semiconductor Ryoki, Naoya; Miyano, Kentaro; Nobuoka, Masaki https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20200181801 US Patent Application 16/691542; 20200181801	patent-application	June 2020
Three-dimensional resistive memory array Wouters, Dirk; Kar, Gouri Sankar https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20150179705 US Patent Application 14/577937; 20150179705	patent-application	June 2015
Method of fabricating a capacitor under bit line DRAM structure using contact hole liners Jeng, Erik S.; Chen, Bi-Ling; Lin, Wei-Ray https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6184081 US Patent Document 6,184,081	patent	February 2001
Gas ring for plasma system and method of manufacturing the same Tsai, Wen-Pao; Huang, Tsung-Yu; Liao, Chung-Hsien https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20160148788 US Patent Application 14/700858; 20160148788	patent-application	May 2016
Magnetic memory and method for manufacturing the same Kanaya, Hiroyuki; Aikawa, Hisanori; Nakatsuka, Keisuke https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20160072045 US Patent Application 14/593611; 20160072045	patent-application	March 2016
Threshold Switching Selector Based Memory Sharma, Abhisheka; Le, Van H.; Dewey, Gilbert https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20210288108 US Patent Application 16/326896; 20210288108 A1	patent-application	September 2021
Transistors Comprising Two-Dimensional Materials and Related Semiconductor Devices, Systems, and Methods Kula, Witold; Sandhu, Gurtej S.; Smythe, John A. https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20200066917 US Patent Application 16/113113; 20200066917 A1	patent-application	February 2020
Rare-earth Magnet Sakamoto, Takeshi; Uchida, Nobuya Tanaka; Tanaka, Yoshitomo https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20070077454 US Patent Application 11/540723;	patent-application	April 2007
Memory device and method of manufacturing the same Nam, Phil Ouk; Son, Yong Hoon; Kim, Kyung Hyun https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20160358927 US Patent Application 15/049160; 20160358927	patent-application	December 2016
High aspect ratio etching method Shih, Yen-Hao; Chen, Chih-Ping; Lai, Sheng-Chih https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20150243674 US Patent Application 14/488937; 20150243674	patent-application	August 2015
Multi-Port Thin-Film Memory Devices Madurawe, Raminda https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20090129174 US Patent Application 12/172989; 20090129174 A1	patent-application	May 2009
Photoelectric Conversion Device and Method for Producing Photoelectric Conversion Device Hasegawa, Isao; Sakata, Hitoshi https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20140027875 US Patent Application 14/039878; 20140027875 A1	patent-application	January 2014
Thermally Stabilized Electrode Structure Chen, Shih-Hung https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20090242880 US Patent Application 12/054861; 20090242880 A1	patent-application	October 2009

Similar Records

Engineering Nanostructured Interfaces of Hexagonal Boron Nitride-Based Materials for Enhanced Catalysis

Journal Article · Tue Nov 15 00:00:00 EST 2022 · Accounts of Chemical Research · OSTI ID:1893014

Chen, Hao; Jiang, De-en; Yang, Zhenzhen; +1 more

Molecularly Thin Electrolyte for All Solid-State Nonvolatile Two-Dimensional Crystal Memory

Journal Article · Tue Oct 29 00:00:00 EDT 2019 · Nano Letters · OSTI ID:1893014

Liang, Jierui; Xu, Ke; Wu, Maokun; +4 more

Process for fabricating glass-encapsulated solar cell arrays and the product produced thereby

Patent · Tue Nov 18 00:00:00 EST 1980 · OSTI ID:1893014

Deminet, C; Oettel, R E

Title: Nanometer scale nonvolatile memory device and method for storing binary and quantum memory states

Citation Formats

References (30)

Similar Records

Related Subjects