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Title: Supply voltage decoupling circuits for voltage droop mitigation

Patent ·
OSTI ID:1823823

Circuits and methods are provided for utilizing decoupling capacitors to mitigate voltage droop on power supply lines of a power distribution network. A power supply line is capacitively decoupled using a first decoupling capacitor connected to the power supply line and charged to a first voltage level of the power supply line. A second decoupling capacitor is pre-charged to a second voltage level greater than the first voltage level and held in standby. A control circuit determines or predicts an occurrence of a droop event in which the first voltage decreases to a level which is at or below a droop threshold voltage level, and selectively connects the pre-charged second decoupling capacitor to the power supply line to source additional boosting current through discharging of the second decoupling capacitor and thereby capacitively decouple the power supply line using the higher second voltage and additional boosting current.

Research Organization:
International Business Machines Corp., Armonk, NY (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
B621073
Assignee:
International Business Machines Corporation (Armonk, NY)
Patent Number(s):
10,972,083
Application Number:
16/359,664
OSTI ID:
1823823
Resource Relation:
Patent File Date: 03/20/2019
Country of Publication:
United States
Language:
English

References (7)

Voltage droop suppressing circuit patent May 2008
Method of and circuit for suppressing noise in a circuit patent October 2010
Early power compensation method and apparatus thereof patent July 2018
Method of forming on-chip decoupling capacitor with bottom electrode layer having surface roughness patent June 2011
First Droop Event Mitigation by Clock Generation Frequency Staggering for Core Power Delivery patent-application December 2016
On-chip power supply boost for voltage droop reduction patent March 2003
Split reservoir capacitor architecture for a charge pump patent October 2018

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