Hardware accelerated dynamic work creation on a graphics processing unit
A processor core is configured to execute a parent task that is described by a data structure stored in a memory. A coprocessor is configured to dispatch a child task to the at least one processor core in response to the coprocessor receiving a request from the parent task concurrently with the parent task executing on the at least one processor core. In some cases, the parent task registers the child task in a task pool and the child task is a future task that is configured to monitor a completion object and enqueue another task associated with the future task in response to detecting the completion object. The future task is configured to self-enqueue by adding a continuation future task to a continuation queue for subsequent execution in response to the future task failing to detect the completion object.
- Research Organization:
- Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- AC52-07NA27344; B620717
- Assignee:
- Advanced Micro Devices, Inc. (Santa Clara, CA)
- Patent Number(s):
- 10,963,299
- Application Number:
- 16/134,695
- OSTI ID:
- 1805681
- Resource Relation:
- Patent File Date: 09/18/2018
- Country of Publication:
- United States
- Language:
- English
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