Technical Report: Accessor Realization
- Karlsruhe Inst. of Technology (KIT) (Germany)
As we have seen the arithmetic power of hardware architectures growing much faster than the memory bandwidth, there is an urgent need to rethink the way we operate, communicate, and store data. A promising strategy for overcoming the “memory wall” is the decoupling of memory precision from arithmetic precision as proposed in Anzt et al.. Such a decoupling of memory precision and arithmetic precision requires a “memory accessor” that handles the conversion between formats (resp. compression of the data) on the fly in registers. For such a memory accessor to be useful in practice, it has to combine multiple characteristics.
- Research Organization:
- Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Karlsruhe Inst. of Technology (KIT) (Germany)
- Sponsoring Organization:
- USDOE National Nuclear Security Administration (NNSA)
- DOE Contract Number:
- AC52-07NA27344; NA0003525
- OSTI ID:
- 1773264
- Report Number(s):
- LLNL-SR-820918; 1032697
- Country of Publication:
- United States
- Language:
- English
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