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Title: Method and apparatus for inter-lane thread migration

Patent ·
OSTI ID:1576343

Briefly, methods and apparatus to migrate a software thread from one wavefront executing on one execution unit to another wavefront executing on another execution unit whereby both execution units are associated with a compute unit of a processing device such as, for example, a GPU. The methods and apparatus may execute compiled dynamic thread migration swizzle buffer instructions that when executed allow access to a dynamic thread migration swizzle buffer that allows for the migration of register context information when migrating software threads. The register context information may be located in one or more locations of a register file prior to storing the register context information into the dynamic thread migration swizzle buffer. The method and apparatus may also return the register context information from the dynamic thread migration swizzle buffer to one or more different register file locations of the register file.

Research Organization:
Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
AC52-07NA27344; B600716
Assignee:
Advanced Micro Devices, Inc. (Santa Clara, CA)
Patent Number(s):
10,409,610
Application Number:
15/010,093
OSTI ID:
1576343
Resource Relation:
Patent File Date: 2016 Jan 29
Country of Publication:
United States
Language:
English

References (2)

GPU Divergence Barrier patent-application April 2015
Unified virtual addressed register file patent July 2014