Compensating for Parasitic Voltage Drops in Resistive Memory Arrays.

Conference · Mon May 01 00:00:00 EDT 2017

DOI:https://doi.org/10.1109/IMW.2017.7939075· OSTI ID:1458000

Agarwal, Sapan; Schiek, Richard; Cook, Jeanine; Marinella, Matthew

Abstract not provided.

• Research Organization: Sandia National Lab. (SNL-CA), Livermore, CA (United States); Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
• Sponsoring Organization: USDOE National Nuclear Security Administration (NNSA)
• DOE Contract Number: AC04-94AL85000
• OSTI ID: 1458000
• Report Number(s): SAND2017-5089C; 653249
• Resource Relation: Conference: Proposed for presentation at the 2017 IEEE International Memory Workshop held May 14-17, 2017 in Monterey, CA.
• Country of Publication: United States
• Language: English