Analytical Performance Modeling and Validation of Intel’s Xeon Phi Architecture
Modeling the performance of scientific applications on emerging hardware plays a central role in achieving extreme-scale computing goals. Analytical models that capture the interaction between applications and hardware characteristics are attractive because even a reasonably accurate model can be useful for performance tuning before the hardware is made available. In this paper, we develop a hardware model for Intel’s second-generation Xeon Phi architecture code-named Knights Landing (KNL) for the SKOPE framework. We validate the KNL hardware model by projecting the performance of mini-benchmarks and application kernels. The results show that our KNL model can project the performance with prediction errors of 10% to 20%. The hardware model also provides informative recommendations for code transformations and tuning.
- Research Organization:
- Argonne National Laboratory (ANL), Argonne, IL (United States)
- Sponsoring Organization:
- USDOE Office of Science (SC), Basic Energy Sciences (BES)
- DOE Contract Number:
- AC02-06CH11357
- OSTI ID:
- 1351827
- Resource Relation:
- Conference: ACM International Conference on Computing Frontiers 2017, Siena (Italy), 15-17 May 2017
- Country of Publication:
- United States
- Language:
- English
Predictive performance and scalability modeling of a large-scale application
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conference | January 2001 |
Skope
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conference | May 2014 |
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